OpenSolaris

1. Project: Enable/Enhance Solaris support for Intel Platform
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   9. Performance Enhancement
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   11. Predictive Self-Healing
   12. I/O Acceleration Technology
   13. Code Contributions
   14. xmm registers inside kernel
   15. CPUID enhancement
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CPUID enhancement

CPUID enhancement encompasses all the work needed to enable/enhance the new CPUID features and instructions being introduced in the upcoming Intel platforms.

Details

CPUID enhancement work is being tracked with bug reports (also known as CR "Change Request").
List of CRs sorted by priority with links to public CR information, owners, and status:

• 6714685 Need to support Intel Advanced Vector Extensions (AVE)
  • Status: Accepted
• 6750666 getisax(2) needs to detect Intel AES instruction set extensions
  • Status: Accepted
• 6719310 Expose availability of MOVBE instruction
  • Status: Accepted
• 6667592 Mismatch between intel_ctab array and processor specification for the cache descriptors
  • Status: Fix Delivered to Nevada 94 by Vinay Devadas
• 6662206 CPUID extensions and new instructions for upcoming Intel processor
  • Status: Fix Available in Nevada 87 by Krishnendu Sadhukhan
• 6667600 Incomplete initialization of cpi_cacheinfo field of struct cpuid_info
  • Fix contributed by Ashok Raj from Intel
  • Status: Fix Available in Nevada Build 87
• 6667614 Incorrect check for Extended Model of processor
  • Fix contributed by Ashok Raj from Intel
  • Status: Fix Available in Nevada Build 87
• 6661255 Incorrect disassembly for SSE4.x instructions under S11 build 79 and 80
  • Status: Fix Delivered to Nevada Build 85
• 6526262 cpuid ssse3 feature not noted on Intel Woodcrest/Conroe processors
  • Status: Fix Delivered to Nevada Build 76
• 6563039 Need support for Intel's SSE4.1 and SSE4.2 instructions
  • Status: Fix Delivered to Nevada Build 76